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ChiselSim waveforms #4246

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HakamAtassi opened this issue Jul 7, 2024 · 4 comments
Open

ChiselSim waveforms #4246

HakamAtassi opened this issue Jul 7, 2024 · 4 comments

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@HakamAtassi
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Hello!

I feel like I'm not the first to ask, but I haven't found anything regarding this as an open issue so I'll ask nonetheless.

ChiselSim. Waveforms. Yes or no?

Can I write chisel/scala tests and dump a VCD like ChiselTest?
@zhutmost
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zhutmost commented Jul 8, 2024

A simple answer is: yes
@HakamAtassi
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A simple answer is: yes

How? Is there a native way of doing that or does it involve tywaves?
@zhutmost
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zhutmost commented Jul 8, 2024

Enable traceEnabled when yourunElaboratedModule during simulation. See

chisel/src/main/scala/chisel3/simulator/package.scala

Line 92 in 8f00067

traceEnabled: Boolean = false,

And I have some wrapper code to make it much easier. See my example here.
@jackkoenig
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It's not exposed with the existing EphemeralSimulator, but there is work towards simpler user APIs like #4209 which should make this easier.
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@jackkoenig @zhutmost @HakamAtassi