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Pull requests: chipsalliance/yosys-f4pga-plugins

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Pull requests list

Arith-stats plugin
#352 opened Jun 15, 2022 by tcal-x Draft updated Jul 9, 2022
[k6n10f] Remove superfluous cell models
#371 opened Jul 21, 2022 by mkurc-ant Loading… updated Aug 22, 2022
foreach loop support
#384 opened Sep 27, 2022 by mglb Draft updated Sep 27, 2022
ql-qlf: k6n10f: Update QL_DSP2/QL_DSP3 logic
#393 opened Oct 28, 2022 by robertszczepanski Loading… updated Oct 31, 2022
CI: check different Yosys versions
#445 opened Jan 24, 2023 by apokusinski Loading… updated Jan 24, 2023
systemverilog-plugin: fix handling large constants
#465 opened Mar 6, 2023 by kamilrakoczy Draft updated Mar 13, 2023
systemverilog-plugin: add parameter type propagation through hierarchy
#469 opened Mar 17, 2023 by joennlae Loading… updated Mar 21, 2023
Adds class struct variable support.
#212 opened Feb 4, 2022 by QuantamHD Loading… updated Apr 26, 2023
WIP: [SDC plugin] Improve error messages
#181 opened Dec 31, 2021 by tmichalak Loading… updated Apr 26, 2023
XDC: Add missing OBUFT primitive
#494 opened Apr 25, 2023 by hannesha Loading… updated Apr 28, 2023
Check for typedefs before calculating width
#505 opened May 8, 2023 by wsipak Draft updated May 18, 2023
antmicro/yosys-systemverilog#1743: Compensate for chipsalliance/Surelog#3670
#522 opened May 30, 2023 by hs-apotell Loading… updated Jun 10, 2023
reversed ranges
#532 opened Jun 19, 2023 by wsipak Draft updated Jun 19, 2023
Parmys (Partial Mapper for Yosys) plugin
#421 opened Dec 15, 2022 by poname Loading… updated Sep 3, 2023
Upgrade GitHub actions with deprecation warnings
#544 opened Sep 4, 2023 by timkpaine Loading… updated Oct 3, 2023
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