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sweeneyal
/
neorv32
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stnolting/neorv32
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Commit History
Commits on Apr 17, 2024
[DMA] use FIRQ select instead of FIRQ mask (
stnolting#877
)
stnolting
committed
Apr 17, 2024
183fa56
Commits on Apr 16, 2024
[docs] update DMA auto-trigger section
stnolting
committed
Apr 16, 2024
5dc4638
[sw] remove whitespaces
stnolting
committed
Apr 16, 2024
fd59f24
[sw] update DMA example program
stnolting
committed
Apr 16, 2024
65a9a1c
[changelog] add v1.9.8.4
stnolting
committed
Apr 16, 2024
9b47317
⚠️
[DMA] use FIRQ select instead of FIRQ mask
stnolting
committed
Apr 16, 2024
cd2b92a
[top] minor XBUS signal rearrangement
stnolting
committed
Apr 16, 2024
c48b378
⚠️
simplify XBUS gateway (
stnolting#876
)
stnolting
committed
Apr 16, 2024
229b8f1
[figures] clearify optional/mandatory address regions/modules
stnolting
committed
Apr 16, 2024
35ead3f
[figures] clearify cached/uncached address space
stnolting
committed
Apr 16, 2024
e579065
[docs] minor cleanup
stnolting
committed
Apr 16, 2024
9f973c4
[docs] CFU: the 4 instr. types are just "recommended"
stnolting
committed
Apr 16, 2024
aab1c6e
[rtl] relax XBUS read-back gate timing
stnolting
committed
Apr 16, 2024
57374b8
Commits on Apr 15, 2024
[rtl] fix XBUS readback gate
stnolting
committed
Apr 15, 2024
bb1acdf
[rtl] update avalon/axi wrappers
stnolting
committed
Apr 15, 2024
e9948fb
[LiteX wrapper] typo fix
stnolting
committed
Apr 15, 2024
8012758
[docs] update XBUS section
stnolting
committed
Apr 15, 2024
891aed6
[rtl] update XBUS interface of LiteX wrapper
stnolting
committed
Apr 15, 2024
61519bf
[changelog] add v1.9.8.3
stnolting
committed
Apr 15, 2024
6afc16d
[docs] update XBUS/Wishbone figures
stnolting
committed
Apr 15, 2024
ff42748
[docs] update top's generic list
stnolting
committed
Apr 15, 2024
e5b05ea
[sim] update testbenches
stnolting
committed
Apr 15, 2024
e6fee6f
[rtl] update top's XBUS generics
stnolting
committed
Apr 15, 2024
71c43d9
[rtl] simplify XBUS gateway
stnolting
committed
Apr 15, 2024
ea01e8f
Commits on Apr 14, 2024
⚠️
rename SLINK data interface registers (
stnolting#874
)
stnolting
committed
Apr 14, 2024
ada832a
[rtl] minor CFU edits
stnolting
committed
Apr 14, 2024
3ff07ad
[rtl] use new file header for LiteX wrapper
stnolting
committed
Apr 14, 2024
976e757
[docs] rename SLINK data registers
stnolting
committed
Apr 14, 2024
117e336
[changelog] add v1.9.8.2
stnolting
committed
Apr 14, 2024
0938023
[rtl] simplify SLINK access logic
stnolting
committed
Apr 14, 2024
7922838
[sw]
⚠️
rename SLINK data registers
stnolting
committed
Apr 14, 2024
10d6db4
[rtl] minor control area optimizations
stnolting
committed
Apr 14, 2024
98f1595
Commits on Apr 13, 2024
use simplified VHDL file headers (
stnolting#873
)
stnolting
committed
Apr 13, 2024
dcbf7bc
[rtl,sim] use simplified VHDL file headers
stnolting
committed
Apr 13, 2024
a62d30e
[rtl] use simplified VHDL file headers
stnolting
committed
Apr 13, 2024
8cfc82a
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