CrossBar Inc.

Design Verification Engineer

CrossBar Inc. Santa Clara, CA

DESIGN VERIFICATION ENGINEER

CrossBar was founded in 2010 to commercialize a radically different approach to non-volatile memory called ReRAM. A unique memory technology that can be integrated inside a system-on-chip or produced as a standalone memory chip, CrossBar ReRAM is playing an important role in enabling this new world. We are seeking a Design Verification Engineer to take ownership of FPGA test platform for the product/test team, and develop all new firmware, software, and communications protocols to meet the team’s requirements. As a Verification Engineer at CrossBar, Inc., your responsibilities include, but are not limited to, the following:

  • Verification of circuits, logic, systems, algorithms, etc. to meet product requirements.
  • Develop formal verification flows and methodologies (UVM) for the non-volatile RRAM memory technology.
  • Be responsible for full chip verification in Verilog/System Verilog.
  • Build and continuously reform verification infrastructure and methodologies to meet the demands of next generation SoCs.
  • Work with architects, RTL designers, validation engineers to ensure that verification requirements are met for each project.
  • Write behavioral models for analog blocks and core array.
  • Mixed-signal chip's logic design and verification, including block level specification, micro architecture design, RTL coding and verification, synthesis and power and static timing analysis.
  • Knowledge of DFT, ATGP, Boundary Scan, & BIST is a PLUS.


Education Requirements/Preference

  • This position requires a Bachelor's degree minimum 5 years’ experience or Master’s degree with 3 years’ experience. Major of micro-electronic is preferred.
  • Experienced in detailed design verification of logic/mixed-signal circuits, including design capture, layout, test, evaluation and debugging of circuit and design.
  • Strong Verilog coding and RTL design skills.
  • Extensive experience with digital simulator, Encounter synthesize, Design Constraint and timing analysis tools.
  • Must have solid understanding of basic concepts of CPU or SoC architecture.
  • Experience with verification of SoCs with embedded processors or CPU verification.
  • Ability to define verification strategies, build up simulation environment, and execute plans at full chip level.
  • Applicant should have technical skills on how to design digital block, have working knowledge of general integrated circuit design flow and EDA tools
  • Familiar with Python/Perl language, C++ and/or tcl script is preferred.
  • Knowledge of Virtuoso P&R is a plus.
  • Dedicated, hardworking and good team player.
  • Has good interpersonal as well as good communication skills.


We offer medical, dental, vision, life, STD, LTD, and AD&D insurance programs, 401(K) Plan and Paid Time Off. Interested candidates please submit your resume with your compensation expectation when applying. CrossBar is an Equal Opportunity Employer.
  • Seniority level

    Mid-Senior level
  • Employment type

    Full-time
  • Job function

    Engineering and Information Technology
  • Industries

    Semiconductor Manufacturing

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