Senior Design Verification Engineer

Company Description

Mirafra Technologies is a technology consulting company specializing in semiconductor Design Services, Embedded Software Development, and Digital Transformation. With a team of over 1000 engineers, Mirafra has a strong presence in Bangalore, Hyderabad, Chennai, Pune, and the United States. They pride themselves on delivering successful projects and maintaining long-term relationships with their customers, which include startups and top semiconductor companies.

Role Description

This is a full-time on-site role for a Senior Design Verification Engineer at Mirafra Technologies in San Jose, CA. The Senior Design Verification Engineer will be responsible for formal verification, RTL design, computer architecture, functional verification, and debugging.

Qualifications

Job Requirements are as below:

Architect block and full-chip verification environments using HVLs and constrained random

techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA 

○ Develop test plans and coverage metrics from specifications and write block and chip-level

tests in C,SV,UVM

○ Debug RTL and Gate simulations and work with design engineers to verify fixes.

○ Write diagnostics for validation of FPGA prototype (pre-tapeout) and ASIC. 

○ Replicate silicon bugs in simulation environments and validate fixes or SW workarounds.

○ Convert verification tests to test patterns and assist Test Engineers on ATE vector bringup.

○ Evaluate latest verification methodologies and develop scripts etc. to automate verification

flows.