Samsung Semiconductor’s Post

NVIDIAis #hiring several ASIC Timing Engineers to join our headquarters in Santa Clara, California. You will develop and execute timing closure plans for NVIDIA's next generation of #cpu, #gpu and #soc designs and will own STA for large subsystems and full chip designs or at block-level with additional responsibilities for block level synthesis/optimization. You will be responsible for all aspects of timing including, timing analysis and closure, timing environment, setting up constraints and defining the timing methodology for the next generation of designs to find the right tradeoffs and balance between frequency and power/area/congestions/yield/etc. #asic #asicdesign #rtldesign #rtl #clocking #clock #sta #methodology #methodologies #fullchip #blocklevel #perl #python #santaclara

2 of 25 #job #openings on 3/27 ✴️ #ASIC engineer ✴️ NVIDIA As promised, I am #sharing: ✅ 25 #job #opportunities ✅ 9 #postdoc #positions ✅ 8 #phd #positions ✅ 6 #intern #roles ✅ 5 #faculty #jobs #checkitout, #share and #follow! #opportunity #usajobs #usa #hiring #hiringnow #open #jobsearch #reshare #engineeringjobs #engineering #givingback #spreadtheword #connectandgrow #repost

If you're the kind of wizard who knows the ins and outs of partition level P&R implementation, from nailing down floorplanning and clock distribution to conquering power distribution and timing closure..then Imagine working on the forefront of innovation, creating extraordinary Apple products that shape the future (BTW have you seen our new Vision Pro product?).  With your strong grasp of physical design construction and analysis flows, you'll be unstoppable here at Apple.  Connect with me and let’s chat about our new SoC PD – P&R openings! #PnR #P&R #placeandroute #chiplevel #blocklevel #floorplanning #flowmethodology #netlist #GDS2 #VLSI #PhysicalDesign #SOC #SOCPD #ASIC #Methodology #STA #machinelearning #cadence #Apple #synopsis #Siemens #Intel #Marvell #Nvidia #Meta #Google #Amazon #Broadcom #Qualcomm #SamsungSemiconductor #Samsung #AMD #DAC #SNUG #CDN #electricalengineering #python #tcl #perl #verilog #Primetime #Fusioncompiler

🚀 Excited to announce that I'm taking on the 100 Days Verilog Challenge! 💻🔧 For the next 100 days, I'll be diving deep into Verilog, honing my skills in hardware description and digital design. From basic logic gates to complex digital systems, I'm ready to explore and expand my knowledge. Why Verilog? Because it's the language of hardware design, and mastering it opens up a world of opportunities in the semiconductor industry and beyond. Whether it's FPGA programming, ASIC design, or digital signal processing, Verilog is at the heart of it all. I'll be sharing my progress, insights, and challenges along the way, so stay tuned for updates! And if you're also passionate about digital design or Verilog, let's connect and embark on this journey together. Let's code, innovate, and build the future, one Verilog module at a time! 💡💪 #100DaysVerilog #HardwareDesign #DigitalDesign #FPGA #ASIC #Semiconductor #Engineering

🚀 Exciting RISC-V Learning Opportunity for Frontend Engineers in VLSI! 🚀 🌐 Dive Deep into Processor Design with RISC-V! 🌐 vlsideepdive is thrilled to share an incredible learning opportunity - a workshop on RISC-V Microarchitecture, RTL Design, and Verification. This program is not just another course; it's a gateway to mastering cutting-edge processor design. 🔍 What's Inside: -> A comprehensive exploration of RISC-V fundamentals. -> Detailed discussions on architectural state, instruction sets, and microarchitecture variations. -> Advanced topics like deep pipelines, branch prediction, superscalar processors, and multithreading. -> Hands-on RTL design using Verilog, with a focus on practical, real-world applications. 🎯 Why This Matters: -> RISC-V is becoming a pivotal architecture in the semiconductor industry. -> Understanding these concepts is crucial for anyone looking to stay ahead in technology and design. -> Whether you're starting or seeking to enhance your skills, this course has something for everyone. Check it out and step into the future of microprocessor design! Contact and Learn more here: https://lnkd.in/gVpirNhG #RISCV #Microarchitecture #TechInnovation #Verilog #ProcessorDesign #FutureOfTech

🔧 Unveiling the Power Behind Chips: Most Popular RTL Design Tools in Semiconductor Solutions 🌐💻 Ever wondered what tools engineers use to craft the brains of your favorite gadgets? 🤔 Dive into the world of RTL design in semiconductors with a peek at the most popular tools shaping our tech future! 🔍🚀 1. Vivado by Xilinx: The go-to for FPGA design, Vivado is a powerhouse for RTL synthesis and implementation, pushing the boundaries of innovation. 💡✨ 2. Synopsys Design Compiler: Where performance meets efficiency! This tool is a trailblazer in RTL synthesis, ensuring chips run like a well-oiled machine. ⚙️🚀 3. Cadence Genus: A game-changer in the RTL design realm, Genus is synonymous with speed, optimizing designs for peak performance. 🏎️💨 4. Mentor Graphics Questa: When it comes to functional verification, Questa takes the lead. It's the gatekeeper ensuring chips do exactly what they're supposed to! 🛡️🤖 5. Xilinx Vivado HLS: HLS (High-Level Synthesis) is the future, and Vivado HLS is at the forefront, turning high-level code into efficient hardware. 🔄💻 6. SpyGlass by Synopsys: The Sherlock Holmes of RTL design! SpyGlass uncovers hidden issues, ensuring designs are Sherlock-approved for reliability. 🔍🕵️♂️ Join the conversation! Which RTL design tool do you find most fascinating? 💬✨ #SmartSoC #SemiconductorTech #RTLDesign #TechTools 🚀💻

RANT_OF_THE_DAY_ALERT: This exactly is the problem in #semiconductors. A product, yes, a product, is launched in the market one year ago. The hardware has bugs in it with workarounds in the firmware and the driver. The driver was not optimal at all at time of launch. It worked, kind of. Then they release updates to fix more bugs found along the way. Optimizations to run at higher frame rates. it took them a year to optimize and bugfix. Even after a year double digit gains are released. Then the semiconductor professionals wonder why software engineers think hardware engineers suck? https://lnkd.in/dBW8hKcb

I am glad to announce that the Maven Silicon Advanced VLSI Design and Verification Course has been completed successfully. Equipped to work on challenges in design in the semiconductor sector with the most advanced abilities. Thankful for the indelible insights and experiences acquired during this significant experience. Learnings and Outcomes: 1.) Digital Electronics 2.) Verilog programming 3.) Static Timing Analysis 4.) System Verilog 5.) Universal Verification Methodology #vlsitraining #vlsijobs #vlsidesign #sta #vlsiverification

🎓 Excited to share that I've just completed an intensive course in VLSI System - On Chip Design from Maven Silicon! 💻🔌Maven Silicon Throughout this course, I delved deep into the intricacies of on-chip design, mastering concepts like RTL design, synthesis, and verification. 💡 I also gained hands-on experience using industry-standard tools and methodologies, preparing me to tackle real-world VLSI design challenges head-on. 💪 I'm grateful to Maven Silicon for providing such a comprehensive and practical learning experience, and I'm eager to apply my newfound knowledge to future projects in the field of Electrical and Computer Engineering. 🔍🚀 #VLSI #OnChipDesign #MavenSilicon #ElectricalEngineering #ComputerEngineering #rtldesign #verilog

🎉 Exciting Update! 🚀 I'm thrilled to announce that I've successfully completed a comprehensive course in VLSI SOC Design using Verilog HDL from Maven Silicon. 🤓💻 Throughout this journey, I've delved deep into the intricacies of designing System-on-Chip (SOC) circuits, harnessing the power of Verilog Hardware Description Language (HDL) to bring my ideas to life. 🌟 🔍 Here's a glimpse of what I've achieved: 🔹 Mastered Verilog HDL for digital design. 🔹 Designed and simulated complex SOC circuits. 🔹 Gained hands-on experience with industry-standard tools. 🔹 Learned crucial skills for VLSI layout design. This course has been an incredible learning experience, equipping me with the skills and knowledge needed to excel in the field of VLSI design. 🚀 I'm excited to apply these newfound skills to real-world projects and contribute to the exciting advancements in semiconductor technology. 🌐 Thank you, Maven Silicon, for this enriching journey! 🙏 #VLSI #SOCDesign #VerilogHDL #MavenSilicon #Semiconductor #CareerDevelopment #Engineering #DigitalDesign