Questions tagged [memory-management]
The memory-management tag has no usage guidance.
321
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In-Place Reordering of Doubly Linked List Nodes to Ensure Memory Contiguity
I am addressing an optimization problem involving a doubly linked list, where nodes are allocated within a contiguous memory block of fixed size $N$. Initially, the spatial locality of nodes in memory ...
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How does paging avoid external fragmentation with different page sizes across processes?
It's commonly said that paging has no external fragmentation, only internal fragmentation.
But I've read that some architectures have support for different page sizes. And different processes can use ...
- 13
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1
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RAM architecture vs. CPU architecture
I have learned that initially PCs had 8-bit memory architecture and that 1 byte (i.e. 8 bits) was the "basic" memory unit because 8 bits was exactly the memory space required to encode any ...
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Why is the default page/block size 4 KiB?
Clearly, some empirical study on an older machine helped us choose a 4KiB page size to balance TLB hit rate and fragmentation. Modern hardware and operating systems support this size for backward ...
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what kind of resources do microservices use when they communicate each other within a same machine?
Assume microservices are in the same machine and they exchange their data via RESTapi calls, what kind of resources (ex:CPU,memory) do microservices use when they communicate each other within a same ...
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Are they talking about virtual memory in this article?
I am reading this Wikipedia article:
https://en.wikipedia.org/wiki/Memory_segmentation
And I am in this paragraph:
Segmentation with paging
Instead of a memory location, the segment information ...
- 125
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1
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Memory addresses requested by CPU vs Memory Address Provided to DRAM
So, i just got through studying DRAM architecture. I learned that a row address, column address, bank number etc are provided to the DRAM during a read operation. Based on the address provided, 64 ...
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Memory Question
Say we're back in the 1950s and our clunky computer has a $1$ kilobyte memory. $1$ kilobyte is $1024$ bytes, which is $8192$ bits. When we consider the entire available storage space, there are $2^{...
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Who and how generate the virtual/logical addresses? Confusion if it's the compiler, the linker, the loader
I know that when I compile a program and then I inspect with objdump, I have addresses. These are relative addresses.
But if it's a C program and I printf with <...
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Problem with cache and memory from university class
In my university class, I received this homework assignment on computer architecture, but I don't know how to solve it. I already know that the correct answer is 0, but I don't understand why. Could ...
- 21
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Thread safety due to no runtime allocation of memory, why?
I was watching a presentation related to the MuJoCo simulator (and other topics which were more relevant for the presentation itself) and at one moment in the presentation it is mentioned that MuJoCo ...
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Cache Miss in First Private Cache but Hit in Shared LEvel 2 Cache: Does it Result in a Penalty?
In the context of Shared Memory Multiprocessor (SMP) systems with different cache levels, if a cache miss occurs in the first private cache but is followed by a hit in the second shared cache, would ...
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What is the hit rate of the cache when executing this code?
C++ code:
int main()
{
short int arr[4][4];
for (int i = 0; i < 8; i++)
{
for (int j = 0; j < 8; j++)
{
arr[i][j] = i+j;
}
}
return 0;
}
Is there ...
- 1
1
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1
answer
55
views
How to find the free memory addresses in RAM?
I am currently trying to build a simple computer in Minecraft (8-bit data, 6-bit addresses, no paging or segmentation), with redstone, where I can make run simple programs written similarly to code in ...
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Roles of 80386 MMU Paging Unit and similarity with modern CPU MMU
While searching for the structure of the MMU, I found the image below (80386 Internal Architecture).
I have three questions.
Q1. I'd like to know the roles of 'Adder', 'Page Cache', and 'Control and ...
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