Senior Staff Layout Engineer
Senior Staff Layout Engineer
Marvell Technology
East Fishkill, NY
See who Marvell Technology has hired for this role
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
CE analog layout team is responsible for delivering high-quality, optimized layouts that meet stringent performance, area, and power specifications. Our group works collaboratively across multiple disciplines to ensure the successful realization of cutting-edge semiconductor products.
What You Can Expect
114,800 - 169,830, $ per annum
The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation And Benefit Elements
At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.
This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
CE analog layout team is responsible for delivering high-quality, optimized layouts that meet stringent performance, area, and power specifications. Our group works collaboratively across multiple disciplines to ensure the successful realization of cutting-edge semiconductor products.
What You Can Expect
- Design and optimize analog mixed-signal layouts on schematics given by design team.
- Work closely with circuit designers and other teams to meet project specifications and timelines.
- Lead layout projects, manage timelines, and ensure deliverables meet quality and performance standards.
- Provide technical guidance and mentorship to junior layout engineers, fostering a collaborative and innovative team environment.
- Maintain detailed documentation of layout methodologies, design decisions, and verification results
- Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 7-10 years of related professional experience.
- Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 5-7 years of experience.
- Proficiency in CAD tools such as Cadence Virtuoso, Mentor Graphics, or Synopsys Custom Compiler. Virtuoso is preferred.
- Expertise on LVS, DRC, ERC, antenna, EM/IR, and ESD/LUP.
- Familiar with FinFET. Preferred if familiar with TSMC 5nm, 3nm, 2nm
- Strong communication and presentation skills.
- Ability to work independently as well as in teams, including remote design teams.
- Ability to manage multiple tasks and projects simultaneously.
- Ability to mentor junior engineers.
- Ability to work across teams.
114,800 - 169,830, $ per annum
The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation And Benefit Elements
At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.
This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
-
Seniority level
Mid-Senior level -
Employment type
Full-time -
Job function
Engineering and Information Technology -
Industries
Semiconductor Manufacturing
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