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Since PCIe g1 x1 is based off PCI 32/66 bandwidth of 2133.33 Mb (1066.67 Mb * 2), theoretically PCIe g3 x1 should be about 8.533 Gb if we simply double the bandwidth every generation.

However this is not actually the case as PCIe g3 x1 is recorded as being 7.8768 Gb which is only 1.8x scale from PCIe g2 x1.

Can someone explain to me what I'm missing here?

Is it a clock-rate thing or a physics thing that's the reason for this?

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  • \$\begingroup\$ You seem to be confused about the speed of PCIe 1.0. While it was designed to have similar performance to it's predecessor (PCI), the clock rate is not the same (as you seem to be assuming). PCIe 1.0 uses 2.5 GT/s, which means it can transfer 2 Gb/s once you account for the 8b/10b encoding. \$\endgroup\$
    – camerondm9
    Commented Nov 26, 2023 at 6:19
  • \$\begingroup\$ Actually I was trying not to assume anything about the clock itself, so the bounds were open for it being different there, the real issue was just the bandwidth not meeting spec, only being close enough to spec, which makes the math for it rather difficult to compute since it's not exactly double. \$\endgroup\$
    – Tcll
    Commented Nov 27, 2023 at 2:32
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    \$\begingroup\$ What I was trying to point out is that you've got the wrong numbers. The PCIe 1 spec states that raw bandwidth is 2.5 GT/s (not 2133 Mb/s). 8b/10b encoding overhead is 20%, leaving 80% = 2.0 Gb/s of usable bandwidth per lane. This is doubled in PCIe 2 to 5.0 GT/s raw bandwidth, with the same encoding leaving 4.0 Gb/s usable bandwidth per lane. PCIe 3 nearly doubles this with a combination of faster clock and more efficient encoding: 8.0 GT/s with 128b/130b encoding leaves 7.877 Gb/s of usable bandwidth per lane (which is 1.97 times faster than PCIe 2, not 1.8 times). \$\endgroup\$
    – camerondm9
    Commented Dec 29, 2023 at 3:04
  • \$\begingroup\$ @camerondm9 ah I see, so the numbers I was paying attention to were from the usable bandwidth after encoding rather than the raw bandwidth where the doubling actually applies, and only coincidentally applies to Gen1 and Gen2 where the encoding changes in Gen3 only slow it down further... That actually does help clear up a lot when the encoding overhead is applied globally... Thanks for that. \$\endgroup\$
    – Tcll
    Commented Jan 1 at 13:43

1 Answer 1

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The Comparison table on the Wikipedia PCI Express page has the following entries relevant to the one lane operation from generation 1 to generation 3:

Version Line Code Transfer rate per lane Throughput (x1)
1.0 8b/10b 2.5 GT/s 0.250 GB/s
2.0 8b/10b 5.0 GT/s 0.500 GB/s
3.0 128b/130b 8.0 GT/s 0.985 GB/s

So, in going from generation 2 to generation 3:

  1. The Line Code changed from 8b/10b to 128b/130b, which is 1.2307 times more efficient (in terms of less overheads per bit of data transferred).
  2. The Transfer rate per line increases from 5.0 to 8.0 GT/s which is 1.6 times faster.
  3. Multiplying the above means generation 2 to generation 3 is 1.969 times more bandwidth.

From the question:

However this is not actually the case as PCIe g3 x1 is recorded as being 7.8768 Gb which is only 1.8x scale from PCIe g2 x1.

I'm not how the 1.8x scale from PCIe g2 x1 to PCIe g3 x1 in the question was determined, since from the above analysis can't seem to repeat it.

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  • \$\begingroup\$ To solve the whole 1.8x conundrum, here's a resource (there are many like it) that notes more precision on PCIe x1 (per lane) per generation, which will give you the 984.6 MB or 7.8768 Gb /s Gen3 bandwidth rate. (Wikipedia isn't the most accurate source here sadly) \$\endgroup\$
    – Tcll
    Commented Nov 25, 2023 at 14:21
  • \$\begingroup\$ I think I see it, the encoder may be the culprit of the ~8% losses keeping the bitrate from being truly double at 8.533Gb... which might be reasonable given the codec is specified to match standard clock rates. So I guess that answers my question of it being a clock thing. :) \$\endgroup\$
    – Tcll
    Commented Nov 25, 2023 at 14:55

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