All Questions
5
questions
3
votes
2
answers
7k
views
PCI-E throughput calculation
could someone please do for me the calculation of total throughput of PCI-E? The best material I could find was a Xilinx pdf that mentioned 2.5Gbps as reference value and somewhat awkward formula that ...
- 133
3
votes
1
answer
941
views
Understanding PCIE and FPGA clock "magic"
I've been trying to understand how PCIE clocking works when it comes to connecting an FPGA to a PCIE slot in a motherboard.
Looking at page 12 of this schematic for exampe:
https://www.xilinx.com/...
- 31
0
votes
2
answers
524
views
PCIe Data clocked refclk question
When only one clock is used in PCIe and let's assume the clock is connected to device A.
How does device B transfer data to device A. Device B does not have a clock source.
- 111
6
votes
1
answer
3k
views
pci express bifurcation - clock fanout buffer needed to split reference clock?
I am designing for a motherboard with a single PCIe x16 slot which can be bifurcated into 2 logical x8 slots with jumper settings. I am designing a board to handle the physical splitting of the port.
...
- 65
1
vote
1
answer
1k
views
PCIE reference clock
I recently completed a PCI-E Gen 1.0 line card design. The line card consisted of 4 Spartan 6 FPGAs sharing one PCIE reference clock. Early on in the design there was a decision to solely use the PCIE ...
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