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2 votes
1 answer
689 views

PCI Express Lane Reversal for REFCLK

PCI Express supports lane reversal for the lanes. Can REFCLK+ and REFCLK- also be swapped? That is, connect REFCLK+ from one device to REFCLK- on the other?
Greg's user avatar
  • 23
1 vote
0 answers
38 views

Can I connect one PCIE_CLKREQ# pin from SoC to two different devices?

In my design, I'm using VL805 USB 3.0 Host Controller which takes 1 lane of PCIe and outputs 4 ports of USB3.2 Gen 1. The platform which I'm building is based on AMD V3000 CPU. My question is, if ...
Firas Abd El Gani's user avatar
2 votes
2 answers
1k views

What is the exact position of the M2 fastener screw's base on the PCB from the slot for 2280 SSD?

I am designing a PCB that uses NVMe m.2 2280 M-Key SSD. I would like to know what is the exact position of the SSD's screw will be located with respect to the SSD slot. The slot that I am using is ...
Boovaragan's user avatar
4 votes
2 answers
2k views

6-Layer Stackup - Where to put the Power Planes?

I have a 6-Layer board (See Design) which is an extension that is connected to a motherboard through a Board to Board Connector. The extension should provide: two USB 3.2 GEN 2 ports, two USB 2.0 ...
Firas Abd El Gani's user avatar
3 votes
1 answer
339 views

Mini PCIe vs PCIe layout

I am designing fast digital lines for the first time. I want to change the PCIe connector of the CM4 IO board to mini PCIe. I reviewed the AN307: Hardware Design Considerations for PCI ExpressTM and ...
metsik's user avatar
  • 173
3 votes
1 answer
392 views

PCIe routing for m.2 key e wifi module

I'm trying to make a PCB which include a WIFI module to m.2 key e. For this I'm using a PCIe connection. As HF routing must follow some guidelines, however I'm strugling a bit with the length of the ...
Yann's user avatar
  • 81
2 votes
2 answers
625 views

PCIe riser card: Does it generate a local PCI clock on riser board?

Does anybody know if a "PCI riser card" generates a local PCIe clock on the riser board that is asynchronous to the PCI clock on the Motherboard, or does the PCIe clock come only from the ...
Bill Moore's user avatar
4 votes
1 answer
214 views

Why do PCI Express riser/adapter cards have electrical components?

I'm looking to make a custom PCI Express right angle adapter because the ones on the market don't work with my space constraints. Now, because it's basically an extension cable, I'd imagine it should ...
Davbog's user avatar
  • 95
3 votes
1 answer
5k views

Minimum requirements to interact with PCI Express

I have a relatively simple project (from the user point of view) in mind. I want to develop a very simple PCI Express (x1) card that users can put into their system and toggle some GPIO's from a GUI ...
DEKKER's user avatar
  • 775
0 votes
1 answer
512 views

PCB Design - Mini Pcie Express to Thunderbolt 1 2/Mini Display

What I want to achieve is to connect a Mini Pcie Express device to a thunderbolt (1 / 2) port. I have looked around and such connector does not seem to exist, so as a computer engineer I went looking ...
Fernando Barbosa Gomes's user avatar
0 votes
1 answer
281 views

PCIE branching not detecting PCIe device [closed]

I am facing an issue with the PCIe in my circuit. The PCIe detection is not happening. We are using an imx6q processor board plugged into our carrier board . The processor board comes with option of ...
Joe Vince's user avatar
  • 145
6 votes
2 answers
6k views

PCIe Layout and Signal Routing

I'm looking to build a simple board that has a 16x PCIe connector, that seats a compatible PCIe video card. I can find the connectors and create a footprint, on the board. I can find and understand ...
Leroy105's user avatar
  • 1,907
0 votes
1 answer
2k views

6-Layer Stackup for PCI express design

I'm pondering over a stackup for a 6-layer board using a couple of PCIe connected ICs. My first idea was to use the following Stackup: Signal GND Power (Multiple power supplies, so it's a split ...
Nico Erfurth's user avatar
2 votes
3 answers
766 views

Guidelines on branching of a PCI express signal

We have 3 PCIe slots on a board, let's call them A, B and C. On this board, slot A will always be populated with a PCIe device, however, among slots B and C, only one of them will be populated. There ...
SomethingBetter's user avatar