All Questions
Tagged with pcie signal-integrity
8
questions
2
votes
0
answers
43
views
Is compliance testing necessary for PCIE3.0 if the SOC and Wi-Fi chipset is on the same board?
In my product, PCIe is just used for data transmission between SOC and Wi-Fi chipset. It's not used for any other purpose. Is compliance testing necessary for this scenario?
What type of SI ...
- 29
0
votes
1
answer
646
views
NVIDIA Jetson custom carrier board does not booting when PCIE device is attached. How can I track the problem?
I have designed an custom NVIDIA Jetson carrier board based on P3449-B01 Jetson Nano Carrier Board reference design by NVIDIA.
The carrier board is working fine, the linux is booting up, however when ...
- 453
4
votes
2
answers
2k
views
6-Layer Stackup - Where to put the Power Planes?
I have a 6-Layer board (See Design) which is an extension that is connected to a motherboard through a Board to Board Connector.
The extension should provide: two USB 3.2 GEN 2 ports, two USB 2.0 ...
- 1,067
2
votes
2
answers
760
views
Why does FPGA PCI Express Tx output have on-chip termination of 100 Ohm?
The Intel Cyclone IV FPGA supports PCI Express (PCIe) generation 1, and the IO standard for the Tx output is PCML at 1.5 V.
The Cyclone IV Device Handbook volume 2 page 1-13 describes that the Tx ...
- 579
18
votes
1
answer
3k
views
Why are PCIE's coupling capacitors so large
I was looking at the PCIE specification, and I don't understand the
requirement for coupling capacitors. For 2.5GT/s, the standard requires
AC coupling capacitors of 75nF to 265nF. I tried to ...
- 388
8
votes
1
answer
1k
views
USB 3.1 over PCIe board edge connector
I am designing a system with a carrier board that has all of active logic on one board and most connectors on a backplane board. The interface between the two boards is a x16 PCIe board edge connector....
- 101
21
votes
1
answer
5k
views
PCIe, diagnosing and improving an eye diagram
I have implemented a design that uses PCIe. It is somewhat different in that the PCIe interface is used as a chip-to-chip communication lane on a single PCB (e.g. no PCIe connector).
The root ...
- 301
8
votes
2
answers
2k
views
PCIe over a short cable
For a new project I need to connect two boards via PCI express. For space reasons a custom cable assembly would be the best solution. But I'm not sure what is the best way to go here.
I've seen Riser-...
- 976