FPGA | Digital Design | Verilog | VHDL
Block or Report
Block or report embedded-explorer
Report abuse
Contact GitHub support about this user’s behavior. Learn more about reporting abuse.
Report abuse
Akhilesh Kumar P
akhileshkumarp
Frontend ASIC Engineer | System Verilog
Ex - Tata Elxsi - Automotive Embedded
Dhruv Joshi
whodhruvjoshi
Currently a Final Year Undergraduate in ECE Domain. I am keenly interested in Digital IC Design, RTL Coding, and Design Verification,
Abhishek Kumar K
code-locker
A highly motivated and results-oriented Embedded Software Engineer with experience in analysis, design, development, testing, and implementation of various embe
Freelancer Mangaluru
Mitu Raj
iammituraj
RTL Design Engineer, Technical Blogger, Philanthropist, Teacher ....
Chipmunk Logic™ India
Shrivatsa Bhat
shrivatsabhat
I am an Enthusiastic programmer; always kind enough to take the challenges in this digital era.
Bachelor's in Electronics and Communication India