All Questions
Tagged with assembly cpu-registers
922
questions
2
votes
1
answer
83
views
Trying to understand object code for "MOV AX,BX", am I dumb or is the textbook bad?
EDIT: Based on the answers and comments, it appears both the book and I are correct. BUT IMHO the book did a poor job of explaining the example, I mean instead of something like "For this ...
- 21
1
vote
1
answer
30
views
ARM Assembly - Why is the output printing differently?
I'm currently learning to code with ARM and was working on this assignment where I need to convert inches to feet. I believe I have everything in working order, but when it comes to printing the ...
- 13
1
vote
0
answers
55
views
Assembly code problem : invalid use of register
I am trying to write a function in assembly (x86_64) that returns the scalar product of two vectors (signed chars). The two first arguments of the function are the two vectors and the third one is ...
- 13
1
vote
1
answer
124
views
Problem with AVX-512 code optimization (NASM)
I had nothing to do, so I decided to study AVX-512 and try to write something in assembler using it. I'm trying to optimize a piece of code that processes large amounts of data using AVX-512 ...
- 13
1
vote
1
answer
60
views
Assembly call bash command with argv[]
I am very new to assembly and I am trying to call:
/bin/bash -c "echo hello; ls -la"
I store the "/bin/bash" command as a string and its address in RBX and RDI.
59 on RAX for the ...
- 41
1
vote
2
answers
154
views
Understanding Byte Order and Register Allocation: Little Endian vs Big Endian
I've been learning about big and little endian architectures and found that my PC operates with little endian. Using a simple program, I loaded the value 0xA000 into the ax register and observed that ...
- 150
2
votes
1
answer
119
views
Understanding the differences between mov and lea instructions in x86 assembly
I'm trying to understand the differences between the mov and lea instructions in x86 assembly language. I've written a simple assembly code snippet , and I've added comments to explain my ...
- 394
0
votes
0
answers
65
views
Move immediate 8-bit value into RSI, RDI, RSP or RBP
I took a look at the opcodes generated by these assembly codes :
xor rsi, rsi
mov sil, 0xFF
and
mov rsi, 0xFF
The first code turns into 48 31 F6 40 B6 FF and the second into 48 C7 C6 FF 00 00 00.
...
- 257
-2
votes
1
answer
72
views
CMP ESI, -20. This part of code makes no sense to me. How does this magic work? [duplicate]
76EB750D 83FE E0 CMP ESI,-20
76EB7510 0F87 AD000000 JA msvcrt.76EB75C3
I don't understand this part of code at all.
Why is dword ESI compared to byte?!
If ESI equals to FFFFFFF0 then ...
- 308
1
vote
1
answer
75
views
Why doesn't this pop instruction restore the register values?
I'm studying an OS implemented in a stm32f103rb. I arrived at 02-ContextSwitch-1 chapter and found that the program crashes and throws this error.
qemu: fatal: Trying to execute code outside RAM or ...
- 165
-1
votes
1
answer
77
views
Setting up Segment Registers, x86
I have a code:
[org 0x7c00]
CODE_SEG equ GDT_code - GDT_start
DATA_SEG equ GDT_data - GDT_start
cli
lgdt [GDT_descriptor]
mov eax, cr0
or eax, 1
mov cr0, eax
jmp CODE_SEG:start_protected_mode
jmp $
...
- 1
3
votes
1
answer
243
views
Performance advantage of 32bit registers in AArch64?
When doing integer operations in AArch64/ARM64, is there a performance difference when using 32bit W{n} registers versus 64bit X{n} registers?
For example, is add W1, W2, W3 any faster than add X1, X2,...
- 91.8k
-3
votes
1
answer
163
views
What is the meaning of "ptr" in assembly?
Since [si] in brackets is like the value at the address si like the *si in C
and since offset si is like &si
what about ptr in
mov dword ptr [si], ax
?
- 9
1
vote
2
answers
108
views
What is the meaning of register1:register2 in assembly language?
What is the meaning of register1:register2 in assembly language.
For example ax:bx, then which type of address will be used in this instruction.
Obviously two registers AX and BX are involved in this ...
- 19
0
votes
0
answers
94
views
The SUB instruction in CPU [duplicate]
Consider the 8-bit CPU only. Let’s say we have two registers, R1 and R2, when performing SUB R1, R2, R2 will be first converted to its two’s complement and than add with R1, but I’m wondering, what if ...
- 81