Skip to content

Issues: chipsalliance/chisel

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Clear current search query, filters, and sorts
306 Open 727 Closed
306 Open 727 Closed
Author
Filter by author
Loading
Label
Filter by label
Loading
Use alt + click/return to exclude labels
or ⇧ + click/return for logical OR
Projects
Filter by project
Loading
Milestones
Filter by milestone
Loading
Assignee
Filter by who’s assigned
Sort
Sort by
Newest Oldest Most commented Least commented Recently updated Least recently updated Best match
Most reactions
👍 👎 😄 🎉 😕 ❤️ 🚀 👀

Issues list

[RFC] New Testers Proposal API Modification Feature New feature, will be included in release notes Request For Comment
#725 opened Dec 6, 2017 by ducky64 3.3.0
54
Better documentation of := vs <> good first issue An issue whose fix is simple. Perfect for a new developer wanting to get involved!
#2087 opened Aug 26, 2021 by mwachs5
49
Remove implicit width truncation / Don't repeat Verilog's assignment issue in Chisel strict-semantics Proposals for stricter semantics
#1163 opened Aug 22, 2019 by schoeberl
49
Modifying the name of the module that comes from Chisel Library.
#1059 opened Apr 4, 2019 by starbrilliance
38
loadMemoryFromFile() should place readmemh() inline for better compatibility
#1293 opened Jan 3, 2020 by antonblanchard
1
@chick
18
ROM construct feature request Feature New feature, will be included in release notes
#266 opened Aug 24, 2016 by shunshou 3.3.0
@azidar
16
Pass Chisel information to firtool to generate debug information for the Tywaves project
#4015 opened Apr 19, 2024 by rameloni
3 of 4 tasks
15
RFC: Deprecate either Decoupled or DecoupledIO? good first issue An issue whose fix is simple. Perfect for a new developer wanting to get involved!
#2463 opened Mar 28, 2022 by mwachs5
12
D/I Question -- contextual information for Instances
#2423 opened Feb 23, 2022 by mwachs5
12
Absorb rocket.DecodeLogic into Standard Library
#1187 opened Sep 23, 2019 by seldridge
12
Fixed-Point type deprecation
#3161 opened Apr 5, 2023 by mvanbeirendonck
11
[RFC] CDC library
#1735 opened Jan 15, 2021 by sequencer 3.6.0
11
Use verilator VPI interface feature request
#331 opened Oct 19, 2016 by ucbjrl 3.3.0
10
MixedVec Doesn't Work with SuggestName
#3031 opened Feb 21, 2023 by seldridge
9
Make ChiselEnum take parameters (to make the width adjust as necessary)
#2418 opened Feb 15, 2022 by mwachs5
9
Incorrect Error Message in Data.connect(...) good first issue An issue whose fix is simple. Perfect for a new developer wanting to get involved!
#1170 opened Sep 3, 2019 by ekiwi
9
Mixed-masked/unmasked-port ReadSyncMem is generated incorrectly when "--repl-seq-mem"
#3278 opened May 14, 2023 by zhutmost
8
java.util.NoSuchElementException: None.get encountered in HasId
#1466 opened Jun 7, 2020 by mwachs5
8
Naming of ready/valid interface API Modification feature request
#1350 opened Feb 19, 2020 by schoeberl 3.3.x
8
Update logging to have name of design in "Elaborating design..."
#1287 opened Dec 23, 2019 by oharboe
8
Counter-intuitive user experience (UX) for simple constant addition usability
#1144 opened Aug 2, 2019 by edwardcwang
8
Digital Top with Analog Black Box feature request
#525 opened Feb 23, 2017 by shunshou 3.X
8
CloneType Should Preserve Probe-ness
#3647 opened Nov 22, 2023 by seldridge
7
BoringUtils.bore does not work properly in when scope bug
#3523 opened Sep 7, 2023 by Tang-Haojin
@sequencer
7
Refactor Queue with dataview+Definition/instance API
#2253 opened Nov 19, 2021 by sequencer
7
ProTip! Type g i on any issue or pull request to go back to the issue listing page.