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MixedVecInit should handle signals with bi-directions like VecInit
#3296
opened May 23, 2023 by
zhutmost
suggestName does not work for IO ports : should error not ignore
#2920
opened Jan 5, 2023 by
zhutmost
Add simulation logging library
feature request
Feature
New feature, will be included in release notes
Backend-dependent inline blackbox
code improvement
feature request
Feature
New feature, will be included in release notes
"Default Block" / more than one match per line for switch statement
API Modification
Challenge Issue
A nice-to-have but difficult to implement
feature request
Feature
New feature, will be included in release notes
Analog type does not allow static addressing of sub-wires
feature request
Feature
New feature, will be included in release notes
Vec of Module IO strips directions and can connect to Bundle with different directions
Challenge Issue
A nice-to-have but difficult to implement
feature request
Source info support for libraries is something that needs more thought and discussion.
feature request
Feature
New feature, will be included in release notes
Support for system verilog interfaces in BlackBox modules
Feature
New feature, will be included in release notes
[RFC] What does it mean to be a Bundle?
API Modification
Feature
New feature, will be included in release notes
Request For Comment
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