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Questions tagged [pcie]

PCIe or PCI Express is a high-speed serial computer bus that offers higher speeds and a lower pin count than earlier standards such as PCI that it is designed to replace. Questions should relate to PCIe design issues not general consumer PC / peripheral issues.

44 votes
5 answers
71k views

Does PCIe hotplug actually work in practice?

I've got into a discussion in the comments of https://security.stackexchange.com/questions/109199/is-physical-security-less-important-now-for-securing-a-server?noredirect=1#comment194327_109199 The ...
pjc50's user avatar
  • 46.9k
26 votes
1 answer
26k views

Address Spaces in PCIe

There are four address spaces in PCI express: Memory Mapped I/O mapped Configuration Space Message Can anyone please explain significance of each address space, and it's purpose in brief ? As per ...
ronex dicapriyo's user avatar
21 votes
1 answer
4k views

Why is there a little nose on the PCIe connector?

PCI express cards have an edge connector with a little notch in it to prevent the card from moving if the socket is longer than the connector. Additionally, the printed circuit board has a protrusion ...
FUZxxl's user avatar
  • 500
21 votes
1 answer
5k views

PCIe, diagnosing and improving an eye diagram

I have implemented a design that uses PCIe. It is somewhat different in that the PCIe interface is used as a chip-to-chip communication lane on a single PCB (e.g. no PCIe connector). The root ...
Funkyeah's user avatar
  • 301
21 votes
2 answers
74k views

What are "sense" pins in 8-pin PCI Express power plug?

I have an ATX PSU that has two 6pin connectors for PCI Express power. Both have Gnd on the lock bar side, and +12V on the opposite side. I lost modular cables that came with the PSU, and it made me to ...
Mołot's user avatar
  • 689
18 votes
1 answer
3k views

Why are PCIE's coupling capacitors so large

I was looking at the PCIE specification, and I don't understand the requirement for coupling capacitors. For 2.5GT/s, the standard requires AC coupling capacitors of 75nF to 265nF. I tried to ...
7efkvNEq's user avatar
  • 388
17 votes
4 answers
5k views

Are PCIe and USB 3.0 the same interface?

I know the title may sound provocative, but I was looking for a PCI hub, and found solutions like these: I noticed that on the PCIe side, there is actually only one adapter (which looks passive) with ...
Federico Massimi's user avatar
15 votes
3 answers
38k views

What do the different interrupts in PCIe do? I referring to MSI, MSI-X and INTx

We have the following interrupts: MSI, MSI-X and INTx. What do these different type of interrupts do in PCIe? I only need a short description. I only know that in PCIe interrupts are generated as ...
quantum231's user avatar
15 votes
1 answer
2k views

Termination of unused mini PCIE lines on a USB only device

We're designing a USB only mini PCIE card and I'm trying to work out if it is required, or at least good practice, to terminate the high speed lines that are unused on the mini PCIE card. I can't find ...
cdjackson's user avatar
  • 188
14 votes
3 answers
7k views

Is USB-C a technically viable substitute for SATA Express connectors?

SATA Express, the successor to SATA, is too new to be widely used yet, but the advancing speed of SSDs appears to make it inevitable, the same as SATA replaced parallel IDE. Despite the name, it isn't ...
Porthem's user avatar
  • 317
11 votes
3 answers
8k views

What is the difference between full duplex and dual simplex?

What is the difference between full duplex and dual simplex? I can not really distinguish the difference. Is it the fact that in full duplex, data can be exchanged simultaneously in both channels ...
MysteryGuy's user avatar
10 votes
3 answers
13k views

What does the "posted" mean in posted PCIE transaction?

What is the etymology of the word "posted" in "posted PCIE transaction"? I've worked with PCIE and I understand the difference between "posted" and "non-posted" PCIE transactions, but I don't ...
Ross Rogers's user avatar
10 votes
1 answer
7k views

Is it possible to only utilise SMBus on PCI Express 1X?

According to the Wikipedia page on PCI Express, the PCI-e 1X slots have 18 pin positions on two lanes (so 36 pins) and positions 5-9 represent SMBus and JTAG. I'd like to hook up a µC as an ...
Polynomial's user avatar
  • 10.8k
9 votes
1 answer
29k views

WiFi module says "mini PCI-e format" with "USB host interface" - what does this mean?

The specifications of a WiFi module meant for embedded projects, says -- mini PCIe format Host interface supports USB.2.0 Works with any board with mini PCIe. Not sure about the interplay of mini ...
bdutta74's user avatar
  • 3,534
8 votes
2 answers
9k views

What does "configuration" refer to in PCI and PCIe? How is this different from "Enumeration"

I am not being able to find a clear description of what configuration means in PCI and PCIe. I have found something called as configuration space, but without knowing what configuration means, it is ...
quantum231's user avatar

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